AFP0RF32CT

Panasonic

Product Lifecycle: Active

Panasonic AFP0RF32CT is a CPU unit within the F32 sub-range, featuring an integrated Programmable Logic Controller (PLC) with transistor outputs. It offers a battery-less automatic data backup and self-diagnostic capabilities. This unit utilizes a MIL connector and mini USB for connections and is designed for DIN rail mounting. It supports the FRAM RS-232C communication protocol and can handle up to 128 x I/O points and 3 x expansion units. The memory capacity is 32K steps for programs and 32765 words / 32K words for data, supporting up to 4096 x I/O points. It includes 16 x digital inputs (24Vdc; Sink / Source; with 6 x high-speed 50kHz counters), 16 x digital outputs (24Vdc; NPN; 200mA transistor; with 4 x 4.8kHz; 1000 resolution PWM channels), and 6 x analog inputs (RTD Pt100 / RTD Pt1000 / RTD Ni1000 / Resistance; with 0.1K/°F / 0.01K/°F resolution). The programming languages supported are Ladder diagram (LD), Structured text (ST), Function block diagram (FBD), Sequential function chart (SFC), and Instruction list (IL). It features an 8-character password setting for program upload protection. The processing time varies from 80ns/step for basic instructions up to 3000 steps, to 1620ns/step for high-level instructions after 3000 steps. Operating modes include periodical interrupt execution, interrupt program execution, constant scan execution, and program edition during RUN download in RUN mode.

AFP0RF32CT

Panasonic AFP0RF32CT is a CPU unit within the F32 sub-range, featuring an integrated Programmable Logic Controller (PLC) with transistor outputs. It offers a battery-less automatic data backup and self-diagnostic capabilities. This unit utilizes a MIL connector and mini USB for connections and is designed for DIN rail mounting. It supports the FRAM RS-232C communication protocol and can handle up to 128 x I/O points and 3 x expansion units. The memory capacity is 32K steps for programs and 32765 words / 32K words for data, supporting up to 4096 x I/O points. It includes 16 x digital inputs (24Vdc; Sink / Source; with 6 x high-speed 50kHz counters), 16 x digital outputs (24Vdc; NPN; 200mA transistor; with 4 x 4.8kHz; 1000 resolution PWM channels), and 6 x analog inputs (RTD Pt100 / RTD Pt1000 / RTD Ni1000 / Resistance; with 0.1K/°F / 0.01K/°F resolution). The programming languages supported are Ladder diagram (LD), Structured text (ST), Function block diagram (FBD), Sequential function chart (SFC), and Instruction list (IL). It features an 8-character password setting for program upload protection. The processing time varies from 80ns/step for basic instructions up to 3000 steps, to 1620ns/step for high-level instructions after 3000 steps. Operating modes include periodical interrupt execution, interrupt program execution, constant scan execution, and program edition during RUN download in RUN mode.

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$455.00

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$455.00

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AFP0RC32T

AFP0RC32T

Panasonic AFP0RC32T is a CPU unit within the C32 sub-range, featuring an integrated Programmable Logic Controller (PLC) with transistor outputs. It offers memory backup and self-diagnostic functions. The unit connects via a MIL connector and mini USB, and is designed for DIN rail mounting. It supports the RS-232 communication protocol and can handle up to 128 x I/O points and 3 x expansion units. The memory capacity is 32K steps for programs and 32765 words / 32K words for data, supporting up to 4096 x I/O points. It includes 16 x digital inputs (24Vdc; Sink/Source; with 6 x high-speed 50kHz counters) and 16 x digital outputs (24Vdc; NPN; 200mA transistor; with 4 x 50kHz Pulse outputs/axes + 4 x 4.8kHz; 1000 resolution PWM channels). There are also 6 x analog inputs (RTD Pt100 / RTD Pt1000 / RTD Ni1000 / Resistance; with 0.1K/°F / 0.01K/°F resolution). Programming is supported in Ladder diagram (LD), Structured text (ST), Function block diagram (FBD), Sequential function chart (SFC), and Instruction list (IL). It features an 8-character password setting for program upload protection. Processing times are 80ns/step for basic instructions up to 3000 steps, with a minimum of 2.2µs, and 320ns/step for high-level instructions up to 3000 steps, with a minimum of 580ns/step for basic instructions after 3000 steps. Operating modes include periodical interrupt (0.5ms-1.5s) execution, interrupt program execution, constant scan execution, and program edition during RUN download in RUN mode.

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